f dg 6301 n_f085 dual n-channel, digital fet general description features *the pinouts are symmetrical; pin 1 and 4 are interchangeable. units inside the carrier can be of either orientation and will not affect the functionality of the device. absolute maximum ratings t a = 25c unless otherwise noted symbol parameter f dg6301n_f085 units v dss drain-source voltage 25 v v gss gate-source voltage 8 v i d drain/output current - continuous 0.22 a - pulsed 0.65 p d maximum power dissipation (note 1) 0.3 w t j ,t stg operating and storage temperature range -55 to 150 c esd electrostatic discharge rating mil-std-883d human body model(100 pf / 1500 w ) 6 .0 kv thermal characteristics r q ja thermal resistance, junction-to-ambient 415 c/w 25 v, 0.22 a continuous, 0.65 a peak. r ds(on) = 4 w @ v gs = 4.5 v, r ds(on) = 5 w @ v gs = 2.7 v. very low level gate drive requirements allowing direct operation in 3 v circuits (v gs(th) < 1.5 v). gate-source zener for esd ruggedness (>6kv human body model). compact industry standard sc70-6 surface mount package. these dual n-channel logic level enhancement mode field effect transistors are produced using fairchild 's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance. this device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal mosfets. sot-23 supersot t m -8 so-8 sot-223 sc70-6 supersot t m -6 1 or 4 * 6 or 3 5 or 2 4 or 1 * 2 or 5 3 or 6 sc70-6 g1 d2 s1 d1 s2 g2 .01 rohs compliant qualified to aec q101 march 2009 fd g6301n_f085 dual n-channel, digital fet ? 200 9 fairchild semiconductor corporation fd g6301 n_f085 rev. a www.fairchildsemi.com 1
electrical characteristics (t a = 25 o c unless otherwise noted ) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 25 v d bv dss / d t j breakdown voltage temp. coefficient i d = 250 a , referenced to 25 o c 25 mv / o c i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v 1 a t j = 5 5c 10 a i gss gate - body leakage current v gs = 8 v, v ds = 0 v 100 na on characteristics (note 2) v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 0.65 0.85 1.5 v d v gs(th) / d t j gate threshold voltage temp.coefficient i d = 250 a , referenced to 25 o c -2.1 mv / o c r ds(on) static drain-source on-resistance v gs = 4.5 v, i d = 0.22 a 2.6 4 w t j =12 5c 5.3 7 v gs = 2.7 v, i d = 0.19 a 3.7 5 i d(on) on-state drain current v gs = 4.5 v, v ds = 5 v 0.22 a g fs forward transconductance v ds = 5 v, i d = 0.22 a 0.2 s dynamic characteristics c iss input capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz 9.5 pf c oss output capacitance 6 pf c rss reverse transfer capacitance 1.3 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = 5 v, i d = 0.5 a, v gs = 4.5 v, r gen = 50 w 5 10 ns t r turn - on rise time 4.5 10 ns t d(off) turn - off delay time 4 8 ns t f turn - off fall time 3.2 7 ns q g total gate charge v ds = 5 v, i d = 0.22 a, v gs = 4.5 v 0.29 0.4 nc q gs gate-source charge 0.12 nc q gd gate-drain charge 0.03 nc drain-source diode characteristics and maximum ratings i s maximum continuous source current 0.25 a v sd drain-source diode forward voltage v gs = 0 v, i s = 0.25 a (note 2 ) 0.8 1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. r q ja = 415 o c/w on minimum pad mounting on fr-4 board in still air. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. fd g6301n_f085 dual n-channel, digital fet fdg6301 n_f085 rev. a www.fairchildsemi.com 2
typical electrical characteristics figure 1. on-region characteristics . figure 2. on-resistance variation with drain current and gate voltage . figure 3. on-resistance variation with temperature . figure 5 . transfer characteristics. figure 4 . on-resistance variation with gate-t o -source voltage. -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 1.8 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) v = 4.5v gs i = 0.22a d 0 1 2 3 4 5 0 0.1 0.2 0.3 0.4 0.5 v , drain-source voltage (v) i , drain-source current (a) v =4.5v gs ds d 2.5v 3.0v 2.0v 3.5v 2.7v 0 0.1 0.2 0.3 0.4 2 2.5 3 3.5 4 4.5 5 i , drain current (a) drain-source on-resistance v = 2.5v gs d r , normalized ds(on) 5.0v 4.5v 2.7v 4.0v 3.5v 3.0v 1 2 3 4 5 0 4 8 12 16 20 v ,gate to source voltage (v) r , on-resistance(ohm) gs ds(on) 25c i = 0.10a d t =125c a 0.5 1 1.5 2 2.5 3 0 0.05 0.1 0.15 0.2 v , gate to source voltage (v) i , drain current (a) v = 5v ds gs d t = -55c j 125c 25c 0 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 0.4 v , body diode forward voltage (v) i , reverse drain current (a) 25c -55c v = 0v gs sd s t = 125c j figure 6 . body diode forward voltage varia tion with source current and temperature. fd g6301n_f085 dual n-channel, digital fet fdg6301 n_f085 rev. a www.fairchildsemi.com 3
figure 10 . single pulse maximum power dissipation. figure 8. capacitance characteristics . figure 7 . gate charge characteristics. figure 9. maximum safe operating area. typical electrical characteristics ( continued) 0 0.1 0.2 0.3 0.4 0.5 0.6 0 1 2 3 4 5 6 q , gate charge (nc) v , gate-source voltage (v) g gs i = 0.22a d v = 5v ds 10v 0.4 0.8 2 5 10 25 40 0.01 0.03 0.1 0.3 1 v , drain-source voltage (v) i , drain current (a) rds(on) limit d dc ds 10s 100ms 10ms v = 4.5v single pulse r = 415 c/w t = 25c q ja gs a 1s 0.1 0.3 1 3 10 25 2 3 5 8 15 30 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0 v gs c oss c rss 0.0001 0.001 0.01 0.1 1 10 200 0 10 20 30 40 50 single pulse time (sec) power (w) single pulse r =415c/w t = 25c q ja a 0.0001 0.001 0.01 0.1 1 10 100 200 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 t - t = p * r (t) a j p(pk) t 1 t 2 q ja r (t) = r(t) * r r =415 c/w q ja q ja q ja figure 11 . transient thermal response curve . thermal characterization performed using the conditions described in note 1 . transient thermal response will change depending on the circuit board design. fd g6301n_f085 dual n-channel, digital fet fdg6301 n_f085 rev. a www.fairchildsemi.com 4
rev. i39 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. * trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life su pport device or system, or to affect its safety or effectiveness. product status definitions definition of terms build it now? coreplus? corepower? crossvolt ? ctl? current transfer logic? ecospark ? efficentmax? ezswitch? * ? fairchild ? fairchild semiconductor ? fact quiet series? fact ? fast ? fastvcore? flashwriter ? * fps? f-pfs? frfet ? global power resource sm green fps? green fps? e-series? gto? intellimax? isoplanar? megabuck? microcoupler? microfet? micropak? millerdrive? motionmax? motion-spm? optologic ? optoplanar ? ? pdp spm? power-spm? powertrench ? powerxs? programmable active droop? qfet ? qs? quiet series? rapidconfigure? ? saving our world, 1mw /w /kw at a time? smartmax? smart start? spm ? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 supremos? syncfet? ? the power franchise ? tinyboost? tinybuck? tinylogic ? tinyopto? tinypower? tinypwm? tinywire? trifault detect? truecurrent?* serdes? uhc ? ultra frfet? unifet? vcx? visualmax? xs? tm ? tm tm datasheet identification product status definition advance information formative / in design datasheet contains the design specificati ons for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the ri ght to make changes at any time without notice to improve design. no identification needed full production datasheet contains final specifications. fair child semiconductor reserves the right to make changes at any time withou t notice to improve the design. obsolete not in production datasheet contains specifications on a product that is discontinued by fairchild semiconductor. the datasheet is for reference information only. anti-counterfeiting policy fairchild semiconductor corporation?s anti-counterfeiting policy . fairchild?s anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support . counterfeiting of semiconductor parts is a growing problem in t he industry. all manufactures of semiconductor products are expe riencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts exper ience many problems such as loss of brand reputation, substa ndard performance, failed application, and increased cost of production and manufacturing delays. fairchild is taking strong measures to protect ourselve s and our customers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fa irchild or from authorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or fr om authorized fairchild distributors are genuine parts, have full traceability, meet fa irchild?s quality standards for handing and storage and provide access to fairchild?s full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and wi ll appropriately address and warranty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unau thorized sources. fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. fd g6301n_f085 dual n-channel, digital fet fdg6301 n_f085 rev. a www.fairchildsemi.com 5
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